- FourCC: IV31, IV32
- Company: Intel, Ligos
- Technical Description: http://www.csse.monash.edu.au/~timf/videocodec/indeo3.txt (mirrored)
- Samples: http://samples.mplayerhq.hu/V-codecs/IV32/
- Partial specification: http://multimedia.cx/mirror/5386232.pdf
Indeo Video 3 is a proprietary video compression algorithm developed by Intel. It is primarily used to encode video in AVI files. The format was commonly seen around the time of 1996 and has since been superseded by Indeo Video Interactive version 4 and 5 (see Indeo 4 and Indeo 5). There are many versions of this codec (R3.1, R3.2) but the version R3.2 (FOURCC 'IV32') is the most common. There is a support for this codec for all major platforms (Windows, Macintosh, Linux).
This document focuses on principles necessary to implement an Indeo Video 3 decoder.
Supported picture dimensions
Indeo3 has the following size restrictions:
width: 16...640 pixels height: 16...480 pixels
All picture dimensions must be a multiple of 4.
Internal pixel format
Indeo Video 3 operates completely in the YUV color space. It uses a special downsampled case of the YVU 4:1:0 format where pixel are represented using only 7 bits. The downsampling is done in the encoder by applying the right shifting on pixel values after color conversion and subsampling. Thus, both encoder and decoder operate internally on pixel values in the range of 0-127. This was done in order to permit the software-based SIMD processing (see software vector operations).
Additionaly the upsampling is needed in the decoder. After each plane was decoded, the pixel values shall be shifted one bit left to convert them back to 8-bit values.
Software vector operations
Indeo3 is built upon the so-called "softSIMD" technique, which allows an emulation of the vector operations purely in software. As this codec was developed there was no processors equipped with a SIMD instruction set, therefore the "softSIMD" can significally boost performance.
In a processor with explicit SIMD (single instruction, multiply data) support, one operation is executed on two or more data sets to produce multiple outputs. The basic idea of the "softSIMD" is to treat the processor registers as containing multiple data words; for example, a 32bit register can be treated as containing four 8bit data words.
The examples below illustrate how the "softSIMD" is implemented in Indeo3: